Interdigitated multiple pixel arrays of light-emitting devices

ABSTRACT

The present invention discloses a plurality of interdigitated pixels arranged in an array, having a very low series-resistances with improved current spreading and improved heat-sinking. Each pixel is a square with sides of dimension l. The series resistance is minimized by increasing the perimeter of an active region for the pixels. The series resistance is also minimized by shrinking the space between a mesa and n-contact for each pixel.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of and commonly-assigned U.S. Utility application Ser. No. 12/419,788, filed on Apr. 7, 2009, by Arpan Chakraborty, Likun Shen and Umesh K. Mishra, entitled “INTERDIGITATED MULTIPLE PIXEL ARRAYS OF LIGHT-EMITTING DEVICES,” attorneys' docket number 30794.123-US-C1 (2005-159-3), which application is a continuation of and commonly-assigned U.S. Utility application Ser. No. 11/264,794, filed on Nov. 1, 2005, by Arpan Chakraborty, Likun Shen and Umesh K. Mishra, entitled “INTERDIGITATED MULTI-PIXEL ARRAYS FOR THE FABRICATION OF LIGHT-EMITTING DEVICES WITH VERY LOW SERIES-RESISTANCES AND IMPROVED HEAT-SINKING,” attorneys' docket number 30794.123-US-U1 (2005-159-2), which application claims the benefit under 35 U.S.C. §119(e) of co-pending and commonly-assigned U.S. Provisional Application Ser. No. 60/624,026, filed on Nov. 1, 2004, by Arpan Chakraborty, Likun Shen and Umesh K. Mishra, entitled “INTERDIGITATED MULTI-PIXEL ARRAYS FOR THE FABRICATION OF LIGHT-EMITTING DEVICES WITH VERY LOW SERIES-RESISTANCES,” attorneys' docket number 30794.123-US-P1 (2005-159-1), all of which applications are incorporated by reference herein.

STATEMENT REGARDING SPONSORED RESEARCH AND DEVELOPMENT

The present invention was made under support from the University of California, Santa Barbara, Solid State Lighting and Display Center member companies, including Stanley Electric Co., Ltd., Mitsubishi Chemical Corp., Rohm Co., Ltd., Cree, Inc., Matsushita Electric Works, Matsushita Electric Industrial Co., and Seoul Semiconductor Co., Ltd.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to high-power light-emitting devices with very low series resistance, improved current spreading and improved heat-sinking.

2. Description of the Related Art

(Note: This application references a number of different publications as indicated throughout the specification by one or more reference numbers within brackets, e.g., [x]. A list of these different publications ordered according to these reference numbers can be found below in the section entitled “References.” Each of these publications is incorporated by reference herein.)

Photonic semiconductor devices fall into three categories: (1) devices that convert electrical energy into optical radiation (e.g., light emitting diodes and laser diodes); (2) devices that detect optical signals (e.g., photodetectors); and (3) devices that convert optical radiation into electrical energy (e.g., photovoltaic devices and solar cells). Although all three kinds of devices have useful applications, the light-emitting device may be the most commonly recognized because of its application to various consumer products and applications

A light-emitting device is a widely used semiconductor device whose main characteristic is that it emits energy in the form of light when a current flows through the device. The basic mechanisms by which light-emitting devices operate are well understood in this art and are set forth, for example, by Sze, Physics of Semiconductor Devices, 2d Edition (1981) at pages 681-703, which is incorporated by reference herein.

The wavelength of light (i.e., its color) that can be emitted by a given material of the light-emitting device is limited by the physical characteristics of that material, specifically its bandgap energy. Bandgap energy is the amount of energy that separates a lower-energy valence band and a higher energy conduction band in a semiconductor. The bands are energy states in which carriers (i.e., electrons or holes) can reside in accordance with well-known principles of quantum mechanics. The “band gap” is a range of energies between the conduction and valence bands that are forbidden to the carriers (i.e., the carriers cannot exist in these energy states). Under certain circumstances, when electrons and holes cross the bandgap and recombine, they will emit energy in the form of light. In other words, the frequency of electromagnetic radiation (i.e., the color) that can be produced by a given semiconductor material is a function of that material's bandgap energy. The full spectrum of wavelength can be covered by semiconductors.

A light-emitting device typically includes a diode structure (i.e., a p-n junction) with an active region to improve confinement of electron and hole wavefunctions for a better recombination efficiency. The active region can comprise a single quantum well and multiple quantum wells, a p-n homojunction, single heterojunction or double heterojunction, with a single or multiple quantum well structure being the most preferred. The nature of quantum wells and their advantages are generally well understood in this art as are the nature and advantages of heterojunctions with respect to homojunctions and vice versa. Accordingly, these will not be described in detail herein other than as necessary to describe the invention.

High brightness light-emitting devices involve high drive-current operation. However, large series-resistance, because of the contacts and the bulk p-regions and n-regions of the devices, results in heating. This leads to the saturation of the output power at higher continuous-wave (CW) drive-currents.

Moreover, high brightness light-emitting devices generally require very high output power. However, conventional light emitters employing semiconductor have a large turn-on voltage as well as a large series resistance because of the resistivity of the bulk p-layers and n-layers. This prevents high current operation because the device generates huge amount of heat with high input electrical power. In addition, the heat generated at higher drive currents leads to the roll-off of the output power.

What is needed, then, is a design for improved high brightness light-emitting devices. Specifically, what is needed is a light-emitting device with very low series-resistance and improved heat-sinking, effectively rendering high current operation of the device for high power light emitting. The present invention satisfies these needs via the development of a new mask design to minimize the effective series resistance, improve current spreading and also allowing better heat sinking.

SUMMARY OF THE INVENTION

The present invention discloses a plurality of interdigitated pixels arranged in an array, with very low series-resistances, improved current spreading and heat-sinking, and high brightness output.

In an exemplary embodiment, each pixel is a light emitting diode, wherein the pixels can be of any geometric shape and any size. In addition, a light emitting surface comprises either a top or bottom of the device.

Each pixel is a square with sides of dimension l. The series resistance is minimized by increasing the perimeter of an active region for the pixels. The series resistance is also minimized by shrinking the space between a mesa and n-contact for each pixel.

Heat-sinking is improved by separating the pixels by a distance.

Current spreading is improved by shrinking the pixels' size. In addition, current spreading is improved by the interdigitated pixels' geometry.

The present invention also discloses a method of fabricating a light-emitting device, comprising fabricating a plurality of interdigitated pixels arranged in an array, with very low series-resistances, improved current spreading and heat-sinking, and high brightness output. In addition, the present invention discloses a device fabricated according to this method.

BRIEF DESCRIPTION OF THE DRAWINGS

Referring now to the drawings in which like reference numbers represent corresponding parts throughout:

FIG. 1 is a schematic cross-section of a light emitting diode structure grown on insulating substrate, wherein the components of series resistance are depicted in the figure.

FIG. 2 is a schematic plan-view of an interdigitated multi-pixel geometry.

FIG. 3 is a graph illustrating the effects of the number of pixels on the series resistance of a blue light emitting device for different device dimensions.

FIG. 4A is a schematic of an array of pixels forming a part of an IMPA light emitting device, wherein the dimensions of the pixel and the bus are shown.

FIG. 4B is a schematic plan view of a single square-shaped light emitting device comprising a die with the dimension of the active area and the p-pads and n-pads.

FIG. 5 is a graph illustrating the variation of the ratio of the effective die area (A_(IMPA)/A_(sq)) as a function of the number of pixel, for different device dimensions (L).

FIG. 6 is a graph that comprises a plot of the series resistance and die-area product vs. N for a blue light emitting device, to obtain the optimum number of pixel (N_(opt)).

FIG. 7 is a graph illustrating the ratio of the input power of the conventional single square-shaped light emitting device and the input power of an IMPA light emitting device with the optimum number of pixel for a L=900 μm and L=300 μm.

FIG. 8 is a graph illustrating the normalized current density, i.e. J(x)/J(0), as a function of the distance from the p-contact edge (x) for different p-contact layer thicknesses.

FIG. 9 is a schematic of a flip-chip light emitting device on a sapphire substrate.

FIG. 10A is a graph illustrating the temperature distribution inside (A) an IMPA light emitting device and FIG. 10B is a graph illustrating a conventional single square-shaped light emitting device with the same active area (L=900 μm) under a drive current of 1 Amp.

FIG. 11 is a graph illustrating the junction temperature of 300×300 μm² IMPA light emitting device as a function of inter-pixel spacing (d), wherein the shaded region indicates the temperature of conventional square-shaped light emitting device under the same drive current.

FIG. 12 is a flow chart that illustrates the steps performed in the processing flow to fabricated nitride-based light emitting diodes according to the preferred embodiment of the present invention; and

FIG. 13 is a display of an I-V curve from a curve tracer using a mask on a 275 nm deep-UV light emitting device, according to the preferred embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

In the following description of the preferred embodiment, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration a specific embodiment in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present invention.

(I) Analysis For Series Resistance

FIG. 1 illustrates a light-emitting device 10 that comprises a diode structure (i.e., a p-n junction) fabricated on a substrate or template 12 with active layers or region (such as quantum wells (QWs)) 14 embedded between p-layers or regions 16 and n-layers or regions 18. The p-layers 16 include both a p⁻ layer 20 and p⁺ layer 22. The device 10 also includes a semi-transparent p-current-spreading layer (i.e., p-contact) 24, thick p-contact 26 and n-contact 28.

For a square-shaped light-emitting device grown on an insulating substrate, such as shown in FIG. 1, with the n-contact 28 surrounding a mesa (comprised of the n-layers 18, active layers 14, p-layers 16, p-current-spreading layer 24 and p-contact 26) from three sides, the total series-resistance of the device (R_(s)) is given by the sum of the resistances from the semi-transparent p-current-spreading layer or p-contact 24 resistance (R_(sp)), the p-contact 26 resistance (R_(cp)), the p-cladding layers 16 resistance (R_(bp)), the n-spreading or n-cladding layer 18 resistance (R_(bn)) and the n-contact 28 resistance (R_(cn)).

For a square mesa of sides L, the total series resistance (R_(sq)) is given by [10]:

R _(sq)=ρ_(sp)/3+ρ_(cp) /L ²+ρ_(p) ·t _(p) /L ²+ρ_(sn)·(L _(sp)+λ)/3L+ρ _(cn)/3L

where, ρ_(sp) is the sheet-resistance of the p-current-spreading layer 24, ρp_(cp) is the p-contact 26 resistance, ρ_(p) is the resistivity of the p-cladding layers 16, ρ_(sn) is the sheet-resistance of the p-layer 18, ρ_(cn) is the n-contact 28 resistance, t_(p) is the thickness of the p-cladding layers 16, λ is the spacing between the mesa and the n-contact 28, and d is the width of the n-contact 28. L_(sp) is the spreading length of the n-layer 18 given by [10]:

L _(sp)=[(ρ_(p) ·t _(p)+ρ_(cp))/(|ρ_(sp)−ρ_(sn)|)]^(1/2)

FIG. 2 is a schematic of an interdigitated multi-pixel array (IMPA) 30, which is comprised of a matrix of square-shaped pixels 32 of length l, and comprising N rows and columns. Each square-shaped pixel 32 allows efficient usage of the chip area compared to a circular shaped pixel as used in a micro-pixel design [11]. The current to the individual pixels are fed by p-bus 34 and n-bus 36 running parallel to each other. The effective active area of the device 30 is given by (N·l)². The resistance of the entire device 30 is given by the sum of the resistances of N² pixels 32 in parallel:

R _(MP)=[ρ_(sp)/3+ρ_(cp) /l ²+ρ_(p) ·t _(p) /l ²+ρ_(sn)·(L _(sp)+λ)/3l+ρ _(cn)/3l]/N ², ρ_(sp)/3·N ²+ρ_(cp) /L ²+ρ_(p) ·t _(p) /L ²+ρ_(sn)·(L _(sp)+λ)/3N·L+ρ _(cn)/3N·L

where L=N·l is the side of a single square-shaped light-emitting device with the same effective active area. Since N>1, therefore R_(MP)≦R_(sq).

FIG. 3 shows the decrease of the series resistance with the increase of the number of pixels per row (N) for different device dimension (L).

Table 1 summarizes the values of different parameters used in the simulations.

TABLE 1 Parameters used in the calculation of R_(s) for a blue LED ρ_(p) 0.6 Ω-cm t_(p) 200 nm ρ_(c) 1 × 10⁻³ Ω-cm² ρ_(sp) 10 Ω/□ ρ_(sn) 20 Ω/□ ρ_(cn) 5 × 10⁻² Ω/cm d 20 μm

The improvement in the series resistance is mainly achieved by the increase in the perimeter of the mesa. The drop in resistance rolls off for large values of N because the series resistance (R_(MP)) is then dominated by the sum of the terms R_(cp) and R_(bp) which are independent of N. The value of N for which the resistance rolls off increases with the device dimension (L).

However, the increase in the number of pixels (N) is accompanied by the increase in the total area of the die.

Consider an IMPA light-emitting device as shown in FIG. 4A with N×N square pixels 32, each pixel 32 with side length of l and a spacing of d between the pixels 32. The effective die area of the IMPA light-emitting device shown in FIG. 4A is given by:

A _(IMPA)=[(l+d)·N+d]·[(2l+d+d)·N/2+d]=[(l+d)·N+d] ²

However, the effective die area of a single square-shaped light-emitting device, as shown in FIG. 4B, and comprised of semi-transparent p-contact 24, thick p-contact 26 and n-contact 28, wherein the semi-transparent p-contact 24 has sides of length L and the p-contact 26 and n-contact 28 have widths of d, is given by:

A _(sq)=(L+2d)·(L+2d)=(L+2d)²

Thus, the ratio of the effective die area of an IMPA light-emitting device and a single square light-emitting device with same effective active area (L²)) s given by:

A _(IMPA) /A _(sq)=[{(l+d)·N+d}/{L+2d}] ² =[{l·N+(N+l)·d}/{L+2d}] ²

A _(IMPA) /A _(sq) =[{L+(N+l)·d}/{L+2d}] ²

FIG. 5 shows the variation of the ratio of the effective die area (A_(IMPA)/A_(sq)) as a function of the number of pixel, for different device dimensions (L). The ratio A_(IMPA)/A_(sq) increases with increase in the number of pixel per row (N=L/l). Or, in other words, the ratio increases by shrinking the size of the individual pixel. We also observe that for a fixed number of pixels (N), the ratio A_(IMPA)/A_(sq) decreases with the increase in the effective active area of the device (L²). Thus, the ratio will be relatively smaller (<3) for larger power chips (L>500 μm) compared to standard chips (L<500 μm).

Thus, we find from FIG. 3 and FIG. 5 that, for a constant effective area (A=L²), the increase in N results in a decrease in the series resistance (R_(s)) of the light-emitting device but at the expense of increased effective die area. To optimize the number of pixel, we determine the value of N for which the product of the series resistance (R_(s)) and the effective die area (A_(IMPA)) is a minimum (see FIG. 6).

The optimum number of pixel (N_(opt)) for different device dimensions and the corresponding series resistance is given in Table 2.

TABLE 2 Chart for optimized LED design for blue LED: L (μm) N_(opt) R_(s)/R_(MP) 100 2 1.4 200 3-4 2.4 300 6-7 4.9 500 12  10.8 700 16-20 18.6 900 21-30 22.9

It can be seen that the N_(opt) increases with the device dimension (L). This signifies that with the increase in the device dimension, the multi-pixel design becomes increasingly beneficial. For large-area devices, the gain in the resistance by increasing the number of pixels for N≦N_(opt), is more significant than the increase in the effective die-area. The ratio of the series resistance of a single square-shaped light-emitting device to the series resistance of the IMPA light-emitting device for the optimum number of pixel is also given in Table 2. The ratio of the input power of the conventional single square-shaped light-emitting device and the input power of the IMPA light-emitting device with the optimum number of pixel for a fixed device dimension (L) is given by:

Λ=P _(sq) /P _(IMPA-opt)=(V ₀ +I·R _(sq))/(V ₀ +I·R _(IMPA))

wherein V₀ is the turn-on voltage of the light-emitting device. The input power is also equal to the heat dissipated as a result of Joule heating. The ratio, A, is plotted in FIG. 7 for two sets of device dimension (L) and three sets of turn-on voltage (V₀). It can be observed that Λ>1 and it increases with the increase in the drive current. This implies that for a fixed L, the multi-pixel design helps in lowering the input power (as well as heat dissipation due to Joule heating) more effectively for higher drive currents compared to smaller drive currents. Also, for a fixed drive current, we find that the multi-pixel geometry for a larger device helps in lowering the input power consumption more effectively than a smaller device. For example, the ratio Λ=3 signifies that for the same drive current, the IMPA light-emitting device will consume (or produce) 3 times lower electrical power (or heat) compared to a standard single square-shaped light-emitting device of same dimension (L).

(II) Analysis for Current Crowding

Let us analyze lateral current spreading in p-side-up mesa structure light-emitting devices with a semi-transparent p-contact. The expression for the current-density J(x) at a distance x from the p-contact edge is given by [10]:

J(x)=J(0)·exp(−x/L _(sp))

where, J(0) is the current density at the p-type contact edge and L_(sp) is the length where the current density has dropped to 1/e value of the current density at the p-contact edge, i.e. J(L_(sp))/J(0)=1/e. L_(sp) is called the current spreading length of the n-layer and for a light-emitting device with a semi-transparent p-contact, L_(sp) is given by the expression [10]:

L _(sp)=[(ρ_(p) ·t _(p)+ρ_(cp))/(|ρ_(sp)−ρ_(sn)|)]^(1/2)

where, ρ_(p) is the resistivity of the p-cladding layer, t_(p) is the thickness of the p-cladding layer, ρ_(cp) is the p-specific contact resistance, ρ_(sp) is the sheet-resistance of the p-current-spreading layer, and ρ_(sn) is the sheet-resistance of the n-layer. Using the values for the parameters given in Table 1, we plot (see FIG. 8) the normalized current density, i.e. J(x)/J(0), as a function of the distance from the p-contact edge (x) for different p-contact layer thicknesses. It can be seen from the figure that the current density drops exponentially in the lateral direction and the rate is mainly governed by the difference of the sheet resistance of the n-layer and the p-contact, i.e. (|ρ_(sp)−ρ_(sn)|). As the area of a single square-shaped light-emitting device increases, the current spreading length becomes much smaller compared to the device dimension (L_(sp)<<L). This results in poor current spreading in the device and the light-emitting device is nonuniformly illuminated. Gao et al. [7,8] showed that the use of interdigitated mesa geometry improved current spreading in light-emitting devices. We propose the use of IMPA geometry to improve lateral current spreading in light-emitting devices. The individual pixels allows uniform current spreading by reducing the dimension of the mesa so that L_(sp)>>l. The shaded region in FIG. 8 shows the current distribution inside a pixel of l. It can be seen that by decreasing the pixel size, uniform current spreading can be obtained within the pixel. This should result in uniform illumination of the entire light-emitting device.

(III) Analysis for Self Heating

The temperature distribution inside the interdigitated multi-pixel light-emitting device was studied by means of thermal simulation assuming steady-state heat conduction. The results were compared to those of a conventional single square-shaped light-emitting device. FEMLAB was used to solve the steady-state heat diffusion equation in 2-D. Joule heating in the light-emitting device was assumed to be the heat source and a flip-chip light-emitting device design was considered. The light-emitting device structure assumed in the simulation (shown in FIG. 9) was comprised of a 100 μm thick sapphire substrate, 4 μm of GaN buffer followed by 1 μm of active region acting as the heat source. Thick metals were used as the solder. Si of thickness 600 μm was used as the submount and it was assumed that the free boundary of the Si submount was at 25° C. The temperature distribution inside an IMPA light-emitting device and a conventional single square-shaped light-emitting device with the same active area (L=900 μm) and under the same drive current (1 A) is shown in FIGS. 10A and 10B. It can be seen that the temperature inside the IMPA light-emitting device (40° C.) is less than half compared to the temperature of the square-shaped light-emitting device (88° C.). In FIG. 11, we have plotted the junction temperature of 300×300 μm² IMPA light-emitting device with different spacing (d), spacing d=0 being a conventional single square-shaped light-emitting device (shown by the shaded region). It was observed that there is a significant reduction in the junction temperature on increasing the spacing from d=0 to d=5 μm This improvement is mainly due to the decrease in the series resistance by implementing IMPA geometry. However, the decrease in the junction temperature for d≧5 μm is due the presence of available area which helps to dissipate the heat generated in the individual pixels. For our actual designs, we have adopted a d=20 μm in order to allow enough space for the n-contact stubs between the pixels.

(IV) Fabrication Process

FIG. 12 is a flow chart that illustrates the steps performed in the processing flow to fabricate nitride-based light emitting diodes according to the preferred embodiment of the present invention. Specifically, the flow chart illustrates a method of fabricating a light-emitting device, comprising the step of fabricating a plurality of interdigitated pixels arranged in an array, with very low series-resistances and high brightness output, wherein each pixel is a light emitting diode and a light emitting surface comprises either a top or bottom of the device.

Block 38 represents the step of performing a blank SiO₂ deposition (150 nm) to protect the p-type aluminum gallium nitride (AlGaN) surface.

Block 40 represents the step of performing a mesa etch.

Block 42 represents the step of performing n-contact formation. In the preferred embodiment, this step includes the deposition of the following layers: 20 nm of titanium (Ti), 240 nm of aluminum (Al), 20 nm of nickel (Ni), and 50 nm of gold (Au), in that order, and then annealing the layers at 870° C. for 30 seconds.

Block 44 represents the step of performing a p-contact formation. In the preferred embodiment, this step includes an SiO₂ wet etch; followed by the deposition of the following layers: 5 nm of Ni and 5 nm of Au, in that order.

Block 46 represents the step of performing p-pad formation. In the preferred embodiment, this step includes the deposition of the following layers: 20 nm of Ti and 400 nm of Au, in that order.

Block 48 represents the step of performing n-pad formation. In the preferred embodiment, this step includes the deposition of 20 nm of Ti and 400 nm of Au, in that order.

(V) Key Features

Note that the technical description described above includes several key features relevant to the fabrication of different kinds of light emitting devices. These key features include:

1. In the preferred embodiments, the quantum wells can comprise any semiconductor.

2. It can be applied to both front-side as well as backside vertical light-emitting devices.

3. Use of multi-pixel array of similar active area as a single square shaped geometry, to increase the perimeter to reduce the series resistance.

4. Smaller individual pixels (smaller pixel area) prevent the current crowding problem by having uniform current distribution throughout the small area.

5. Use lithography techniques with resolution of 1 μm or less to reduce the separation between the mesa and the n-contact for lowering the series resistance.

6. Have the pixels separated from each other facilitate heat sinking

7. Scale the inter-pixel separation with the individual pixel size for better thermal management.

8. Have interdigitated geometry for better contact scheme.

(VI) Possible Modifications and Variations

The following describes possible modifications and variations of the invention:

1. The present invention can be used with any semiconductor light-emitting device.

2. Different pixel sizes and different pixel arrays can be used to improve heat sinking and maximize the output power.

3. Different pixel geometry like circular, hexagonal, rectangular, etc., can also be used.

4. Spacing between the pixels can be changed to improve the heat sinking

5. Can be applied to flip-chipbonded light emitting devices.

(VII) Advantages and Improvements

The key features identified above constitute the most critical and novel elements in the design of the interdigitated multi-pixel array mask for light emitting device design.

The present invention minimizes the series resistance mainly by shrinking the space between the mesa and the n-contact as well as increasing the perimeter of the active regions. This is the biggest advantage of the present mask design over other multi-pixel designs. (See, e.g., Appl. Phys. Lett. 85, 1838 (2004), which is incorporated by reference herein).

Further, the multi-pixel geometry also has lower series resistance compared to a single stripe-shaped geometry of similar area. This is because the resistance of thin p-contact layer for the long stripe geometry is much larger than the metal resistance of the distributed pixels.

In the present invention, an attempt has been made to improve the heat sinking by having a distributed array of pixels. Different pixel sizes and inter-pixel separations have been used. Such a distributed array of pixels is very important for thermal management of light-emitters operating at very high CW drive-current levels. The heat generated as a result of Joule heating needs to get dissipated within the wafer for improved performance at CW operations.

Finally, the use of the present invention has enabled, for the first time, the fabrication of a deep-UV light-emitting device with a series resistance as low as 2 Ohm and blue light-emitting device with series resistance as low as 0.5 Ohm, for 300 micron device, and that allows operating the device at 3.5 Amps direct current. FIG. 13 is a graph illustrating an I-V curve from a curve tracer using a mask on a 275 nm deep-UV light-emitting device, according to the preferred embodiment of the present invention. The device had excellent thermal stability under high-current CW operation. Also, it was possible to drive 3.5 Amps through a 200 micron device for more than 1 minute without any degradation.

REFERENCES

The following references are incorporated by reference herein:

Publications

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CONCLUSION

This concludes the description of the preferred embodiment of the present invention. The foregoing description of one or more embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto. 

1. A light-emitting device, comprising: at least one pixel, wherein the pixel is a light emitting diode; and a p-bus and an n-bus for providing current to the pixel, wherein the p-bus, the n-bus, or both the p-bus and the n-bus has an interdigitated geometry for providing the current to the pixel.
 2. The device of claim 1, wherein the interdigitated geometry includes at least one set of fingers feeding the current to the pixel.
 3. The device of claim 2, wherein there are a plurality of the pixels are arranged in an array, and the interdigitated geometry includes a first set of fingers feeding the current into rows of the pixels in the array and a second set of fingers feeding the current into the pixels within each row of the array.
 4. The device of claim 2, wherein heat-sinking is improved by separating the pixels by a specified distance.
 5. The device of claim 2, wherein current spreading is improved by shrinking the pixels' size.
 6. The device of claim 2, wherein lateral current spreading is improved using an interdigitated multi-pixel array (IMPA) geometry for the pixels.
 7. The device of claim 1, wherein light extraction is improved using transparent conducting oxide contacts.
 8. The device of claim 1, wherein the light emitting diode comprises an n-contact surrounding a mesa from at least three sides, the mesa being comprised of one or more each of n-layers, active layers, and p-layers, and the mesa having at least a semi-transparent p-contact thereon.
 9. The device of claim 8, wherein series resistance is minimized by increasing the active layers' perimeter.
 10. The device of claim 8, wherein series resistance is minimized by shrinking space between the mesa and the n-contact.
 11. The device of claim 1, wherein the device is a flip-chip light emitting device.
 12. A method of fabricating light-emitting device, comprising: fabricating at least one pixel, wherein the pixel is a light emitting diode; and fabricating a p-bus and an n-bus for providing current to the pixel, wherein the p-bus, the n-bus, or both the p-bus and the n-bus has an interdigitated geometry for providing the current to the pixel.
 13. The method of claim 12, wherein the interdigitated geometry includes at least one set of fingers feeding the current to the pixel.
 14. The method of claim 13, wherein there are a plurality of the pixels are arranged in an array, and the interdigitated geometry includes a first set of fingers feeding the current into rows of the pixels in the array and a second set of fingers feeding the current into the pixels within each row of the array.
 15. The method of claim 13, wherein heat-sinking is improved by separating the pixels by a specified distance.
 16. The method of claim 13, wherein current spreading is improved by shrinking the pixels' size.
 17. The method of claim 13, wherein lateral current spreading is improved using an interdigitated multi-pixel array (IMPA) geometry for the pixels.
 18. The method of claim 12, wherein light extraction is improved using transparent conducting oxide contacts.
 19. The method of claim 12, wherein the light emitting diode comprises an n-contact surrounding a mesa from at least three sides, the mesa being comprised of one or more each of n-layers, active layers, and p-layers, and the mesa having at least a semi-transparent p-contact thereon.
 20. The method of claim 19, wherein series resistance is minimized by increasing the active layers' perimeter.
 21. The method of claim 19, wherein series resistance is minimized by shrinking space between the mesa and the n-contact.
 22. The method of claim 12, wherein the device is a flip-chip light emitting device.
 23. A device fabricated according to the method of claim
 12. 